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基本資訊

上班地點: 新北市板橋區遠東路1號6樓A室
職務類別: 數位IC設計工程師 全職
需求人數: 1 人
更新日期:

工作內容

POSITION SUMMARY:

Primary Job Description
• Responsible for testing and storage PCB design. Start from PCB board design, work with layout and simulation team, debug and test engineering samples, build test platform and/or scripts, perform qualification tests and work with NPI team for release to production
• Will plan system hardware architecture and prototype
• Will interface with SMRAT global design teams, suppliers, product and marketing team, and customers
• International traveling may be required for customer on site or manufacturing debug

PRINCIPLE DUTIES AND RESPONSIBILITIES:
• Communicate and work with global design teams to development and design FPGA based products and testing hardware
• Design and layout review with engineering teams
• Understand application needs and work with vendors/customers for modifying design as required
• Plan and survey new system hardware functions
• Understand design target and build test plan/write test program and DVT platform design while managing product from manufacturing to release to production
• Ability to debug and determine root cause for RMA, DVT, and production test failure samples and provide justified solutions
• Follow SMART defined and documented design and development process and make improvements to improve efficiency and accuracy

工作待遇: 待遇面議 (經常性薪資達4萬元或以上) 薪資行情

福利制度

正職員工享優於勞基法福利

*.週休二日
*.優於勞基法的特休制度, 新進人員即享有特休
*.不扣薪病假
*.女性同仁生理假
*.考試假
*.產假/陪產假

*.勞保/健保/團保/職災保險
*.勞工退休金
*.績效獎金
*.年終獎金
*.中秋獎金
*.ESPP

*.健康補貼金
*.尾牙摸彩/贈獎
*.員工旅遊
*.部門聚餐
*.慶生會
*.人性化管理, 舒適辦公環境

工作型態

出差外派: 需出差,一年累積時間約三個月以下
上班時段: 日班
休假制度: 週休二日
管理責任: 不需負擔管理責任

條件要求

接受身份: 上班族
可上班日: 不限
工作經歷: 3年以上
學歷要求: 大學以上
科系要求: 電機電子工程相關
語文條件: 英文 -- 聽 /中等、說 /中等、讀 /中等、寫 /中等
擅長工具: MCUASICRTLVerilogVHDL
其他條件:
Mandatory Requirements:

Minimum education: Bachelor’s degree in Electrical Engineering or equivalent

Experience:
• Minimum 5 years of hardware design experience.
• Experience in Xilinx or Intel(Altera) FPGA board design with high speed signal interface
• Proficient in OrCAD for schematic design
• Skillful in layout tools for layout review

Qualification
• Good communication skills in English, TOEIC 650+ is required.

Additional Preferences
• Experienced in DDR3 or DDR4 module design is a plus
• Experienced in PCIe or GENZ interface schematic design is a plus
• Experienced in CPLD schematic design is a plus

聯絡方式

聯絡人: 鄭小姐

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